Semiconductor manufacturers have exploited the advantages of ball grid array (“BGA”) technology to help produce electronic devices that are smaller, faster, and more reliable. Unfortunately, through the increase of size of such BGA packages, the tendency for the package to warp due to inherent stresses increases. Specifically, package warpage has been observed during the elevated temperature processes due to the different coefficient of thermal expansion (“CTE”) properties between the flip-chip package substrate material, copper conductor layers, the chip itself, and other substrate assembly materials. Moreover, because these packages also incorporate metal components, the propensity for internal stresses further increases, especially during lamination or adhesion steps. Practically speaking, a package that has warped more than a predetermined amount is rendered useless because the connectors of the package cannot physically connect to a rigid or planar Printed Circuit Board (PCB). Likewise, a highly warped substrate may not be able to contact a flip-chip. The problem is further exacerbated when a package is configured to have a large footprint—thus a smaller amount of warpage results in a larger displacement of the connectors at the outer extremes of the package.